High performance semiconductor switching devices have enabled substantial increases in power density in power converters. Switching devices formed from silicon have dominated the power management field for the past fifty to sixty years and much optimization of such devices has been accomplished during that period. However, the material properties of silicon are currently limiting further improvement in switching devices made from silicon. Therefore, high current switching devices made from wide band-gap material such as silicon carbide (SiC) and nitrides of Group III semiconductor materials such as gallium nitride (GaN) have emerged as promising devices for high voltage, high frequency, high efficiency and high power density power conversion with low on-state resistance.
The wide band-gap devices can be categorized into two types defined by their operation mode: enhancement mode (normally off) and depletion mode (normally on). The depletion mode switches usually have a lower on-resistance and a smaller junction capacitance than the enhancement mode switches and therefore are deemed more attractive for applications that require high efficiency at a higher frequency. Such transistors are referred to as high voltage, normally-on transistors. The threshold voltage for depletion mode devices is negative. Therefore, a depletion mode device with a low voltage silicon MOSFET or transistor having similar characteristics for controlling the depletion mode device is an appealing alternative to other types of transistor switches. Such a configuration is known as a cascode structure.
In high voltage (e.g. greater than 400V) and high frequency (e.g. above about 100 KHz) applications, turn-on switching losses in power devices are significant and so-called soft switching or zero voltage switching (ZVS) turn-on is required for pursuing high efficiency. The fundamental principle of ZVS turn-on is to provide resonance between a circuit inductance and a (possibly parasitic) capacitance and use the resonant current to discharge the junction capacitance of the high voltage switching device to zero volts prior to the arrival or assertion of the driving signal or internal turn-on occurs. While it is most simple and preferred to use resonant current to achieve ZVS, the negative current to discharge the junction or other parasitic capacitance can be provided in other ways such as an induced current. Therefore, in using ZVS, parasitic capacitances are of substantial importance to assure that the capacitance is fully discharged prior to the next turn-on instant. If the capacitance is not fully discharged before turn-on, the capacitance will be discharged through the conduction channel of the high voltage device, causing significant losses.
Unfortunately, the voltage distribution between the silicon MOSFWT (Si-MOSFET) and high voltage normally-on device in the cascode structure may result in internal switching loss even when it is intended to operate under ZVS conditions. In a cascode connection, when the charge of the drain-source parasitic capacitance of the normally-on high voltage device is larger than the sum of the drain-source parasitic capacitance of the silicon FET and the gate-source parasitic capacitance of the high voltage device, it will prevent full discharge of drain source parasitic capacitance of the high voltage device during what would otherwise be a ZVS turn-on transition which causes internal losses. Moreover, such a charge imbalance will generally drive the drain-source voltage of the silicon MOSFET above the avalanche breakdown voltage, causing further losses, and operation in a mode which is not recommended and which thermally compromises the cascode-connected device. Therefore some of these devices have not been suitable for high frequency operation in a desirable cascode connection switching device.